82510 sy 20100312-s00001 no.a1684-1/6 http://onsemi.com semiconductor components industries, llc, 2013 august, 2013 LV5749NV application the LV5749NV is a 1-channel step-down switching regulator. functions ? 1 channel step-down switching regulator controller. ? load-independent soft start circuit. ? on/off function. ? built-in pulse-by-pulse ocp circuit. it is detect ed by using on resistance of an external mos. ? synchronous rectification. ? current mode control. ? synchronous drive by external signal. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v in max 45 v allowable power dissipation pd max mounted on a specified board. * 0.74 w operating temperature topr -40 to +85 c storage temperature tstg -55 to +150 c * : when mounted on the specified printed circuit board (114.3mm 76.1mm 1.6mm), glass epoxy recommended operating range at ta = 25 c parameter symbol conditions ratings unit supply voltage range v in 8.5 to 42 v error amplifier input voltage 0 to 1.6 v bi-cmos lsi 1-channel step-down switching regulator orderin g numbe r : ena1684 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV5749NV no.a1684-2/6 electrical characteristics at ta = 25 c, v in = 12v ratings parameter symbol conditions min typ max unit reference voltage block internal reference voltage vref incl uding offset of e/a 0.654 0.67 0.686 v 5v power supply v dd i out = 0 to 5ma 4.7 5.2 5.7 v triangular waveform oscillator block oscillation frequency f osc rt = 220k 110 125 140 khz frequency variation f osc dv v in = 8.5 to 42v 1 % on/off circuit block ic start-up voltage v en on 2.5 3.0 3.5 v ic off voltage v en off 1.1 1.3 1.5 v soft start circuit block soft start source current i ss sc en > 3.5v 4 5 6 a soft start sink current i ss sk en < 1v, v dd =5v 2 ma uvlo circuit block uvlo lock release voltage v uvlo 7.5 8.0 8.5 v uvlo hysteresis v uvlo h 0.7 v ocp circuit block ocp charge current i ocp 5 a error amplifier input bias current i ea in 100 na error amplifier transconductance g ea 1000 1400 1800 a/v sink output current i ea osk fb = 1.0v -100 a source output current i ea osc fb = 0v 100 a current detection amplifier gain gisns 1.5 over current limi ter circuit block reference current 1 i lim 1 mode = l (gnd) -10% 18.5 +10% a reference current 2 i lim 2 mode = h (v in ) -10% 37.0 +10% a over current detection comparator offset voltage v lim ofs -5 +5 mv over current detection comparator common mode input range v in -0.45 v in v pwm comparator vt max duty cycle = dmax 0.9 1.0 1.1 v input threshold voltage (fosc = 125khz) vt0 duty cycle = 0% 0.4 0.5 0.6 v maximum on duty dmax 80 85 90 % output block output stage on resistance (the upper side) r onh 5 output stage on resistance (the under side) r onl 5 output stage on current (the upper side) i onh 240 ma output stage on current (the under side) i onl 240 ma the whole device standby current i ccs en < 1v 10 a mean consumption current i cca en > 3.5v 3 ma
LV5749NV no.a1684-3/6 package dimensions unit : mm (typ) 3178b pin assignment sanyo : ssop16(225mil) 5.2 4.4 6.4 0.22 0.65 (0.33) 18 9 16 0.5 0.15 1.5max 0.1 (1.3) 1 fb top view comp 2 en 3 rt 4 sync 5 sw 6 cboot 7 hdrv 8 ss 16 ilim 15 v in 14 ocp 13 mode 12 gnd 11 v dd 10 ldrv 9 LV5749NV 0 0.7 0.2 1.0 -40 80 0.38 60 20 40 0 100 0.8 -20 0.4 0.6 ambient temperature, ta -- c pd max -- ta allowable power dissipation, pd max -- w specified circuit board : 114.3 76.1 1.6mm 3 glass epoxy board
LV5749NV no.a1684-4/6 block diagram pin function pin no. pin name description 14 v in power supply pin. this pin is monitored by uvlo function. when the voltage of this pin becomes 7.7v or more by uvlo function, the ic starts and the soft start function operates. 11 gnd ground pin. each reference voltage is based on the voltage of the ground pin. 10 v dd power supply pin for an external the lower mos-fet gate drive. 7 cboot bootstrap capacity connection pin. this pin become s a gate drive power supply of an external nchmosfet. connect a bypath capacitor between cboot and sw. 6 sw pin to connect with switching node. the source of nchmosfet connects to this pin. 5 sync external synchronous signal input pin. 9 ldrv an external the lower mosfet gate drive pin. 8 hdrv an external the upper mosfet gate drive pin. 1 fb error amplifier reverse input pin. by operating the converter, the voltage of this pin becomes 0.67v. the voltage in which the output voltage is divided by an external resistance is applied to this pin. 2 comp error amplifier output pin. connect a phase compensation circuit between this pin and gnd. 16 ss pin to connect a capacitor for soft start. a capacitor for soft start is charged by using the voltage of about 5 a. this pin ends the soft start period by using the voltage of about 1.1v and the frequency fo ld back function becomes active. 15 ilim reference current pi n for current detection. the sink current of about 20 a flows to this pin when low level (gnd) is set to the mode pin. also, the sink current of about 40 a flows to this pin when high level (v in ) is set to the mode pin. when a resistance is connected between this pin and v in outside and the voltage applied to the sw pin is lower than the voltage of the terminal side of the resistance, the upper nchmos fet is off by operating the current limiter comparator. this operation is reset with respect to each pwm pulse. 3 en on/off pin. 13 ocp pin to set the time of the timer (d uring double the over current detection point) connect a capacitor between this pin and gnd. ocp charge current : 5 a 4 rt pin to set the oscillation frequency. c onnect a resistance between this pin and gnd. 12 mode pin to switch the over current detection point. set by the low level (gnd) of the ilim pin. set by the high level (v in ) of the ocp pin. when this mode pin is set to the high level and the point of th e over current detection is set by using the ilim pin is exceede d, the value becomes double the original value. also, when the mode pin is set to the low level, the point of the over current detection remains an original value. 14 v in v cc 12 mode 15 ilim 16 ss 1 fb comp 11 gnd 9 ldrv 10 v dd + - + - + - + - 0.67v sd + + - 13 ocp 1.25v ocp comp1 ocp comp2 current amp err amp rt sync dmax = 90% pwm comp shut down(sd) 1.0v 0.5v 5v mode l 18.5 a mode h 37 a 5 a 5 a 5v regulator reference voltage saw wave oscillator osp logic s r q control logic uvlo 5 4 en 3 6sw 8 hdrv 7 cboot 2
LV5749NV no.a1684-5/6 timing chart when the mode pin is set to the high level and the point of the over current detection is set by using the ilim pin is exceeded, the value becomes do uble the original value. also, when the mode pin is set to the low level, the point of over current detection remains an original value. timing chart of the over current detection point switching is as below. setting chart 1. output voltage setting ? setting of the output voltage vout is as follows. vout = 1 + r4 r3 v ref = 1 + r4 r3 0.67(typ) [v] 2. soft start setting ? setting of capacitor c5 is as follows. c5 = iss tss v ref = 5 tss 0.67 [f] iss : charge current value. tss : soft start time 3. ocp timer setting ? setting of ocp timer capacitor c11 is as follows. c11 = iocp tocp vocp comp1 = 5 tocp 1.3 [f] iocp : charge current value. tocp : ocp time 4. current limiter setting ? setting of the current limiter set resistance r5 is as follows. r5 = rdson iout iilim = rdson il max 18.5 [ ] iilim : ilim current value. il : inductance current value rdson : on resistance value between q1 drain-souces. t 1.25v current limit 2 a for example 6a current limit 1 a for example 3a over current detection point during high mode over current detection point during low mode load current 0v ocp
LV5749NV ps no.a1684-6/6 sample application circuit sync c10 open c12 open c4 open q1 mch6406 d1 dse010 q1 mch6406 mode en ss comp rt cboot sync h/l on/off v in = 8.5v to 12v vout = 5v c6 1000pf c11 680pf hdrv sw ldrv fb v dd gnd ocp v in ilim ss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.
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